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111 Commits 4 Branches 20 Tags
b0eedef3e51d6959af8ef7ad2f7a3bb0d4d22abc
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Author SHA1 Message Date
rob thijssen b0eedef3e5 Improve full-precision bound checks for CUDA G2 coverage and hashing 2025-09-14 09:11:55 +03:00
rob thijssen 05bb5d885f Increase CUDA kernel ABI version and add coverage bounds check 
Limit per-thread iterations to prevent hashing beyond assigned coverage
range in the kernel and update kernel launch parameters accordingly.
 2025-09-14 08:28:10 +03:00
rob thijssen 2a2bc1f60b debug and warn logs for CUDA G2 winner diagnostics 
Update cuda-miner-3060-debug.env with optimized thread and iteration
settings
 2025-09-14 05:46:26 +03:00
rob thijssen 060a851300 Bump CUDA ABI version to 2 and use sentinel values for winners 
Use u32::MAX as invalid sentinel for winner coordinates to improve
result validation. Also update ABI version constant to reflect this
change.
 2025-09-13 13:17:48 +03:00
rob thijssen 25fdbf6ed2 Add kernel ABI version constant and probe in CUDA engine 
Probe device kernel ABI version if present for better compatibility and
add logging for fallback when winner coordinates readback fails.
 2025-09-13 13:01:30 +03:00
rob thijssen fa9b90ef28 report winner thread and iteration via output buffers for nonce 
reconstruction
 2025-09-13 12:44:27 +03:00
rob thijssen 9739f7c08a record winner thread and iteration on device for accurate nonce 
reconstruction
 2025-09-13 12:33:49 +03:00
rob thijssen fbd143f1cc Fix nonce calculation by tracking per-thread base nonces 2025-09-13 12:17:15 +03:00
rob thijssen d8c96df8ba Add alternative nonce mappings to diagnose CUDA false positives 2025-09-13 12:02:40 +03:00
rob thijssen 8dada4cb61 Add additional host distance check for false positive logs 2025-09-13 11:45:24 +03:00
rob thijssen 24ba4b0aa4 Fix qpow kernel to use h_le instead of digest_be in XOR and assignments 2025-09-13 11:31:23 +03:00
rob thijssen fd048d4923 Fix big-endian byte order handling in qpow kernel 2025-09-13 11:19:20 +03:00
rob thijssen 17eb8e473c Fix byte order in qpow kernel to use big-endian reversal 2025-09-13 11:04:29 +03:00
rob thijssen 39d68b989c Fix digest big-endian conversion to preserve lane order 2025-09-13 10:54:00 +03:00
rob thijssen ff477754d2 Use big-endian bytes consistently in qpow kernelSHA3 digest and 
comparisons
 2025-09-13 10:36:23 +03:00
rob thijssen 860503792c Adjust qpow kernel to use lane-LE byte order for target and threshold 
Convert constants and inputs from big-endian to lane-LE byte order to
match SHA3 output layout, enabling correct XOR and comparison operations
with SHA3 digests stored in lane-LE format.
 2025-09-13 10:26:34 +03:00
rob thijssen 03d3225478 Clarify sha3_512_64bytes_le input interpretation 2025-09-13 10:15:38 +03:00
rob thijssen 57483a0050 Refactor GPU kernel for G2 SHA3-512 with threshold check 
- Clean up and unify endian conversion and load/store helpers -
Implement device-side SHA3-512 with correct lane ordering - Add bytewise
big-endian XOR distance calculation and comparison - Optimize early-exit
with atomic flag and optional debug outputs - Remove duplicate/unused
code and improve readability
 2025-09-13 09:57:45 +03:00
rob thijssen b72be05386 Fix Keccak state indexing in keccak_f1600 kernel for CUDA 2025-09-13 09:19:02 +03:00
rob thijssen 7a3c40d8e8 Unroll Keccak-f1600 rounds for better performance 2025-09-13 09:06:33 +03:00
rob thijssen 642b596fad rewrite distance and comparison logic to use big-endian byte arrays 
instead of uint64 limbs
 2025-09-13 08:51:47 +03:00
rob thijssen 6048d08664 optimize big-endian distance calculation in qpow kernel 2025-09-13 08:38:45 +03:00
rob thijssen f62eff6be1 use little-endian output and byte-wise XOR in qpow kernel 2025-09-13 08:20:09 +03:00
rob thijssen 734b4fbb74 richer diagnostics for cuda false positive logging 2025-09-13 07:56:47 +03:00
rob thijssen 5fe204349f Add debug output buffers to CUDA G2 kernel and log on false positive 
rejection
 2025-09-13 07:43:18 +03:00
rob thijssen 16057a8e20 Add optional CUDA sampler readback and parity check 
Enable sampler debugging via MINER_CUDA_SAMPLER env var to verify
host/device parity of sampler outputs, logging warnings on mismatch

Add example env file for RTX 3060 debug configuration
 2025-09-13 06:24:28 +03:00
rob thijssen 8a6de1a53f Simplify CUDA build workflow by removing Dockerfile 
Replace multi-stage Docker build with direct use of cuda-builder image
for building and stripping quantus-miner binaries, streamlining CI
steps.
 2025-09-13 06:07:01 +03:00
rob thijssen 8db0496b88 sampling logic for debugging decisions 2025-09-13 04:52:01 +03:00
rob thijssen 0aaacdf85d Add optional CUDA sampler support and big-endian SHA3 output 
- Introduce constant memory variables and device buffers for sampler -
Initialize sampler in CudaEngine when MINER_CUDA_SAMPLER=1 - Change SHA3
kernel to output digest bytes in big-endian format - Add sample mismatch
metric counter
 2025-09-13 04:02:06 +03:00
rob thijssen 191cc799b7 fix: cuda metrics and initialize estimated rate gauge 2025-09-13 02:42:48 +03:00
rob thijssen 300fa89927 Add optional metrics and big-endian limb support to CUDA engine 
- Add `metrics` dependency and feature to engine-gpu-cuda crate -
Introduce constant memory for target and threshold values in CUDA kernel
- Implement limb-wise big-endian conversions for distance calculations -
Use constant memory when available for target/threshold within kernel -
Emit backend label metric for GPU CUDA engine - Track false positives
with metrics on host verification failure
 2025-09-13 01:54:54 +03:00
rob thijssen 9fc95a1ca8 Add estimated rate and candidate metrics to mining jobs 2025-09-13 01:23:26 +03:00
rob thijssen 4bffb144cb Add host re-verification for CUDA results and new metrics 
Reject false positives from device by verifying on host and add
Prometheus counters for estimated rates, found and false-positive
candidates per engine and job.
 2025-09-13 01:16:23 +03:00
rob thijssen 9c87c711b3 script support for cuda miner binary builds on dev workstation 2025-09-13 01:16:07 +03:00
rob thijssen 92f58d1b76 immutable bindings for is_g2 and d_distance 2025-09-13 00:10:40 +03:00
rob thijssen 4ca906ac1b corrected host-side constant upload to pass CStrings 2025-09-12 23:55:04 +03:00
rob thijssen 943d35100f Fix conditional use of n0_inv in qpow Montgomery kernels 2025-09-12 18:35:01 +03:00
rob thijssen 398c9f9bc9 Use __constant__ memory for per-job constants in CUDA kernels 
Add optional __constant__ symbols for G2 kernel constants and prefer
these over parameter pointers when available. Update host code to
attempt populating these constant symbols for faster access.
 2025-09-12 18:14:26 +03:00
rob thijssen b7f56fb05a Add CUDA miner environment presets for various NVIDIA GPUs 
Provide example .env files targeting typical block/thread configurations
for RTX 3060/3080/3090/4080/4090/5090 and A5000/A6000.

Include guidance on tuning iterations, pinned buffers, and kernel modes.
Document usage with systemd and manual export for ease of deployment.
 2025-09-12 17:19:23 +03:00
rob thijssen 69cbb7fa99 remove 1024 thread cap in CUDA kernel launches 2025-09-12 16:24:45 +03:00
rob thijssen 1d956c499e Allocate and copy-back CUDA output buffer for G1 path 
Add optional pinned host buffer support and parallel host SHA3
validation over GPU results, updating hash count and early exit on
success.
 2025-09-12 16:00:52 +03:00
rob thijssen 297a74181a Refactor CUDA kernel launch to conditionally allocate output buffer 
Allocate d_y_out only for G1 kernel instead of always allocating before
launch, and track kernel type with is_g2 flag for clearer control flow.
 2025-09-12 15:52:21 +03:00
rob thijssen 9167b8e48d Refactor CUDA kernel launch to separate G1 and G2 modes 
Reorder code to launch G2 kernel with on-device SHA3 and early-exit
handling separately from G1 kernel that returns y values. Rename index
variables for clarity and adjust logging to measure kernel execution
time in both branches.
 2025-09-12 15:09:32 +03:00
rob thijssen baf15fbb75 Add G2 kernel with device SHA3-512, early-exit, and threshold compare 
- Implemented qpow_montgomery_g2_kernel for on-device SHA3-512 hashing -
Added early-exit flag and linear index tracking in G2 kernel -
Integrated G2 kernel launch and result handling in Rust CUDA engine -
Introduced MINER_CUDA_MODE=g2 config option to select G2 kernel - Added
MINER_CUDA_PINNED option for pinned host buffers and async copies -
Updated README with new runtime config knobs and G2 usage instructions
 2025-09-12 14:38:13 +03:00
rob thijssen 5b44ef20df Use optional pinned host buffer and async copy for CUDA results 
Enable using a page-locked pinned buffer with asynchronous copy-back
when MINER_CUDA_PINNED is set, otherwise fall back to synchronous copy.
 2025-09-12 14:00:53 +03:00
rob thijssen c0fa1d15aa Limit SHA3 host hashing to remaining range and use scoped threads 2025-09-12 12:56:58 +03:00
rob thijssen cec209170f Fix paths-ignore order in CUDA workflow triggers 2025-09-12 12:47:29 +03:00
rob thijssen 99af459363 Reorder disk action step in CUDA build workflow 2025-09-12 12:44:04 +03:00
rob thijssen 910e614cfb Add MINER_CUDA_IMAGE override and parallel host SHA3 workers 
- Allow forcing PTX or CUBIN image via MINER_CUDA_IMAGE env var - Enable
selecting G2 kernel with fallback to G1 via MINER_CUDA_MODE=g2 -
Allocate device constant buffers once outside loop - Implement parallel
host SHA3 over GPU results using MINER_CUDA_HASH_THREADS - Update README
with new env vars and usage notes
 2025-09-12 12:40:47 +03:00
rob thijssen abd8c878f7 Add disk space cleanup action and integrate in CUDA workflow 
Ignore unrelated file changes in CUDA workflow triggers to reduce
unnecessary runs
 2025-09-12 11:29:06 +03:00